Project profile
DomainECE
SpecializationVLSI
TechnologyVerilog · Testbench · FPGA/EDA tools
Career directionVLSI / Verification
Build plan
✓ Define functional specification
✓ Write RTL
✓ Create directed tests
✓ Add edge/error cases
✓ Run synthesis where tools permit
✓ Compare design alternatives and document results
Documentation
• RTL specification template
• Testbench checklist
• Simulation evidence sheet
• Timing/power comparison table
• Report outline
• PPT outline
• Viva prompts